Avances en el desarrollo del ZX-Uno

[radastan]

Puedo jugar con los lotes para que te salga más barato. Por ejemplo con 1 lote del primer enlace y 2 del segundo enlace conseguimos los 11, pero tendrías que pagar la diferencia:

http://www.aliexpress.com/item/5pcs-lot ... 98378.html
http://www.aliexpress.com/item/Free-Shi ... 08853.html

Serían $86.60-$74= $12.60. Te saldría por $12.60 (en lugar de los $7.40 del resto). Si no lo consigues por menos de $12.60 podemos hacerlo así.

-- Actualizado 25 Mar 2014, 21:36 --

En cuanto a la Flash puedo pedir los 20 del primer enlace restando lo que cuesta en el segundo enlace:
http://www.aliexpress.com/item/W25Q80-S ... 68841.html
http://www.aliexpress.com/item/Free-shi ... 80590.html

Te sale a 9-5.93= $3.07. Al resto de la gente le sale a $0.60 pero se llevan 1 chip, tú te llevarías 10 (te sale a la mitad cada uno)

Veamos, presupongo que habría que pedir placas nuevas por los consejos que ha dado Mc Leod referente a las pistas. ¿cuánto tendría que pagar yo para tener una placa de las nuevas y lo que has comentado? ¿podrías enviarme al menos la FPGA y la FLASH soldadas?

[JULIO]

Si vais a hacer un nuevo pedido, apuntadme a un kit completo con placa y esos nuevos componentes.

[antoniovillena]

Veamos, presupongo que habría que pedir placas nuevas por los consejos que ha dado Mc Leod referente a las pistas. ¿cuánto tendría que pagar yo para tener una placa de las nuevas y lo que has comentado? ¿podrías enviarme al menos la FPGA y la FLASH soldadas?

Por las PCBs no te preocupes, se van a fabricar de más, bastantes de más. Esta vez vamos a panelizar porque necesitamos probar a la vez prototipos con 2 y 4 capas (por si los de 2 capas siguen teniendo ruído). Las dimensiones del panel pueden ser 10x15 (saldrían 2 placas por cabeza, a $12 el panel) o bien 15x15 (salen 4 placas por cabeza, a $14 el panel). Miraré también en iteadstudio porque la verdad que seeedstudio a 4 capas es carete.

-- Actualizado 26 Mar 2014, 15:20 --

Si vais a hacer un nuevo pedido, apuntadme a un kit completo con placa y esos nuevos componentes.

Hasta que no tenga los gerber asegurados no abriré la lista. Estate pendiente para cuando la abra.

-- Actualizado 26 Mar 2014, 15:37 --

Nada, en iteadstudio sale más caro todavía. No sé si pedir 2 placas para cada uno por 8.70 € o bien 4 por 10 €. Es poca la diferencia aunque lo más probable es que las placas sobrantes no valgan para nada. En el anterior prototipo salió la PCB por 2.5 € porque era una sola placa a 2 caras. Esto significa que el segundo prototipo se encarece entre 6.2 y 7.5 € por la PCB y unos 0.50 € por los nuevos componentes (FPGA y SPI Flash son ligeramente más caros). Calculo que saldrá por unos 30 €

[aowen]

Well the good news is that I'm getting the same behavior with esxDOS 0.8.5 for divIDE running on the emulated ZX Spectrum SE with SE Basic 4.0.5. Without an actual ZX-Uno board this is all I can test against. However, because the behavior is exactly what you have reported I believe a fix that gets it working on the divIDE / ZX Spectrum SE should also work for the divMMC / Chloe 280SE. The bad news is I don't know what the cause of the problem is. The good news is that it does just seem to be the tape handling that is affected which hopefully isolates the problem to the tape code. It would be good to know exactly what esxDOS is doing, but unfortunately it's closed source and I don't really feel like trying to work it out from an uncommented disassembly.

Ok, so I've joined the esxDOS forum and seen McLeod_IdeaFix's posts. NMI support is broken because esxDOS assumes the startup code is exactly as it is in the original ROM. I can't fix that. Also I don't really care about the file loader. Virtual tape support is broken because esxDOS makes some assumptions about the tape code. I might be able to fix that, but only if I can figure out what esxDOS is actually doing. I'm not even going to try to attempt to fix it without a copy of the esxDOS source. However, everything else functions as normal. This means that tape programs need converting to run natively from the hard disk, but I'm perfectly happy with that. The lack of an .rm command is annoying. Right now you have to use RESET * "filename" to remove a file. Worst case scenario I can swap the RESET and DELETE tokens.

[mcleod_ideafix]

...necesitamos probar a la vez prototipos con 2 y 4 capas (por si los de 2 capas siguen teniendo ruído)...

Con 4 capas desde luego se puede controlar mejor la impedancia de las pistas, pero manteniendo las velocidades que estamos usando (esto es, nada de ejecutar la ROM desde la propia SPI, por-favor-no-seas-malaje) y observando los consejos que puse antes, con 2 capas debería funcionar "just fine".

[antoniovillena]

Con 4 capas desde luego se puede controlar mejor la impedancia de las pistas, pero manteniendo las velocidades que estamos usando (esto es, nada de ejecutar la ROM desde la propia SPI, por-favor-no-seas-malaje) y observando los consejos que puse antes, con 2 capas debería funcionar "just fine".

Por eso voy a pedir las dos variantes (2 y 4 capas) y que cada uno monte la que le apetezca (siempre que haya al menos una de cada). En esta última versión de los esquemáticos he añadido el conector VGA. Necesito saber los valores de las resistencias/condensadores para los 3 filtros delta-sigma.

[mcleod_ideafix]

Necesito saber los valores de las resistencias/condensadores para los 3 filtros delta-sigma.

¿Qué 3 filtros sigma-delta? ¿¿Pretendes sacar una señal analógica por sigma-delta por VGA?? Eso son muchos megahercios. No lo aconsejo... si quieres señal analógica a las frecuencias de VGA, mejor con resistencias ponderadas, como hacemos para RGB.

Para que te hagas una idea: la frecuencia del conversor sigma-delta se calcula como: Fc = Fs * 2^(n+1)

Donde:
Fc es la frecuencia mínima que debe tener el conversor sigma-delta
Fs es la frecuencia máxima que va a tener la señal analógica que resulte del conversor
n es el número de bits del conversor
^ no es el operador XOR, sino la potencia

Para una señal de 3 bits por color primario, suponiendo una señal VGA estándar de 640x80 (25MHz de reloj de pixel), nos da:
Fs = 25MHz / 2 = 12.50MHz
n = 3
Fc = 12.50 * 2^4 = 200MHz

Y conseguir que el diseño sea lo suficientemente rápido como para sacar una señal a 200MHz por un pin, para luego filtrarlo y obtener de ahí la señal analógica... pues tiene su guasa. Más si son 3 módulos independientes los que deben trabajar a 200MHz. La verdad es que nunca he trabajado a esas frecuencias, ni siquiera en el interior de la FPGA.

-- Actualizado 26 Mar 2014, 22:58 --

Ah! Viendo el esquemático creo que hay un error: las tomas de 1.2V y 3.3V aparecen ANTES de la ferrita (en la salida del regulador), cuando deben aparecer DESPUES de ella. Si no, no vale de nada ponerla.

[antoniovillena]

Ok. Ya he corregido ambas cosas, lo de los filtros delta-sigma y lo de las tomas de 1.2V y 3.3V.

-- Actualizado 27 Mar 2014, 02:12 --

Hi superfo. This message is for you, as indications to route the PCB. Mainly it's a traslation of some spanish messages written before.

New changes in the prototype:

• The FPGA now is a LX9
• Removing the 2.5V regulator
• All pins in LX9 are input/output configurable. Unlike 250E where they were many "only input" pins
• It's multiboot. So we can put 2 different configurations and select them in the BIOS (for example a ZX Spectrum and a Jupiter Ace)
• The SPI Flash chip now is W25Q80, instead W25X40. Also we can transfer data between the FPGA four times quicker
• We can choose between DB9 (Joystick) or DB15 (VGA) in the same location

Bug fixes:

• The microUSB connector must be more robust, 4 clamps instead 2
• Better footprints for some connectors in which plastic legs fit into the PCB. As I remember they were (with plastic legs): 3.5mm jacks, SD, microUSB and PS/2
• Thicker PCB. 1.6mm instead 1.0mm
• Do an alternative 4 layer PCB and try both (2 layer and 4 layer). If 2 layer works well we use it in the final version because is significantly cheaper

Recommendations from McLeod:

• For signals that can be above 10MHz this is the recommendation
  
  • Track width of 20mil (this can be complicate but if not are 20mil, as "fatty" as you can)
  • Also, if it's possible, avoid vias. That is, route all the track in the same layer. If this is not possible (you must use a via) put the via in a position multiple of the wavelength of the signal. For example, imagine that we are going to route CLK that is 50MHz and we can put in the same layer (we must use a via). The wavelength of a 50Mhz signal is 6 meters (wavelength= light of speed / frequency of signal). You won't put a via at 6 meters from start of the track, but you can do it in a multiple (power of 2 in reality) closer. We say for example 1024, so the via could be located at 6000/1024 = 5.86mm from start of the track. This is for minimize signal bounces and lost of energy in the signal (as radiation and this is not good) due to apperance of stationary waves that occurs when the enviroment changes (when we from a track in a layer to a track in the other layer with a via in the middle)
  • Following the track with 2 parallel planes of ground (like a coaxial cable in 2D)
  • Plane of ground in the opposite layer of the track (or track of ground following the same path of the track)
• Also add a common-mode choke in the 5V power line
• Add a ferrite bead in SMD (like smd resistors 0805) to the output of each voltage regulator, and another one for the analogic power of AD724
• In the tracks that go to the expansion connector, choose one or two (for example the two shorter ones) and treat them as if they were clock signals. That is, plane of ground in the opposite layer and surrounded of ground area in left and right. The idea is to have at least 2 clock signals for a possible external device (as Spectranet)
• Leds location. If they can be in the same position as the Raspberry Pi holes (upper right) better, because they can be viewed from outside

-- Actualizado 27 Mar 2014, 02:32 --

This image is for panelize the PCB. The PCB size is 15x15cm and we put 4 ZX-Unos on it (two 2-layers and other two 4-layers). Note that the PCB is all 4-layer, so you must use only the two outer layers in the 2-layers design. Black rectangles are 2-layers, blue rectangle are 4-layers, and red limit is where we must do the cut. The sub-boards should only be separated by silkscreen

https://www.seeedstudio.com/blog/2011/1 ... alization/

pcb.png (1.59 KiB) Visto 5969 veces

[aowen]

I believe this version of SE Basic IV resolves all but two major issues with esxDOS:

1. NMI autoload does not work. The NMI autoload depends heavily on the original ROM. Use tapein and LOAD "" instead. All other NMI functionality works.

2. Folder paths are tokenized. This is a limitation of esxDOS using the period ( . ) for commands. The tokenizer is aware of Spectranet syntax and does not tokenize after a percent sign ( % ) but it is not safe to stop tokenizing after a period. I have suggested to the esxDOS authors that all filepaths should be enclosed in quotes ( " ) to prevent tokenization. However, there is a workaround. SE Basic IV does not tokenize anything in lowercase if CAPS LOCK is active. So you can enter the esxDOS command in lower case and then enable CAPS LOCK before pressing ENTER.

[mcleod_ideafix]

Tested:
- .tapein works. I can select a TAP file and load from the SD card with LOAD "". No resets or bad loads.
- .tapeout works as well. I've created a SCREEN$ file from a BASIC program and saved succesfully in a TAP file that later has been loaded with .tapein / LOAD "" SCREEN$
- .snapload works, but this command must be used with caution because a snapshot may be generated while the CPU was running core from the ROM
- TRDOS emulation works. I've been able to mount a TRD file onto a virtual disk, invoke TRDOS with RANDOMIZE USR 15616, and load and run the program contained in the TRD.

Doesn't work:
- If I trigger any BASIC error, for example, trying to print a non existent variable, the machine hangs for about a minute or so, and then it shows the message "Out of memory, 0:1". The BASIC program that could be in memory becomes corrupted.
- If I generate lots of output on screen (for example, listing a large directory using .ls ) and the Scroll? message is presented, pressing SPACE, or N to stop scrolling causes nothing, or the machine resets . Precisely: if I run a program like this:

Código: Seleccionar todo

10 PRINT 3: GOTO 10

Pressing N or SPACE is response to the Scroll? question doesn't do anything. I have to stop with NMI/BREAK.

If I list a large directory with .ls , pressing SPACE or N in response to Scroll? causes the machine to reset.